Description:
Summary:TheASIC STA Engineerwill be a member of a team working on next generation100G-1T coherent opticalcommunications products. This role is a senior contributor focused on delivering highly complexASICsin advanced technology nodes that are used in these next-generation telecom systems. The role involves detailedrunning timing analysisanddriving timing closureat the full-chip level. This includes providingECO scriptsand guidance to designers for delivering tape-out quality for all parts of the
Feb 13, 2026;
from:
dice.com