Description:
Job Title: Digital DV Engineer Location: Tucson, AZ Job Description: Digital DV within a mixed signal chip (ADC), Digital based simulation environment, Test bench not required, it is available already, Test cases to be developed. No need to develop models, Develop test plan etc.. System Verilog, Unix/Linux, Cadence tools Xcelium, Windows based tools.
Jan 6, 2026;
from:
dice.com