Description:
Position - Tech Lead - FPGA Design Verification Location: Washington Redmond or Seattle (Onsite at customer location) Experience Required: 815 years . Engagement: Long-term | Full-time / Contract Onsite Requirement: Yes Role Overview We are seeking a highly experienced Tech Lead FPGA Design Verification with strong hands-on expertise in SystemVerilog/UVM and proven leadership capabilities. The ideal candidate will lead verification activities while actively contributing to complex FPGA/ASIC ver
Dec 23, 2025;
from:
dice.com