What
Where
0
Home Browse jobs About us Contacts
  1. Home
  2. Santa Clara
  3. Python developer
What
Where

Python developer jobs in Santa Clara (3 jobs)

Lead fpga verification engineer with uvm /verilog system-active requirement
Last month
Company
Schedule
Employment
Source
Sort by:

Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
... problem-solving Scripting experience in Python or Perl Knowledge of Verilog ...
4 days ago

Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
... and problem-solvingScripting experience in Python or PerlKnowledge of Verilog and ...
6 days ago

Lead FPGA Verification Engineer with UVM /Verilog System-Active Requirement

  • Data Capital Inc
  • Santa Clara
... problem-solving Scripting experience in Python or Perl Knowledge of Verilog ...
10 days ago

Get new python developer jobs in Santa Clara by email

By creating a job alert, you agree to our Terms You can change your consent settings at any time by unsubscribing or as detailed in our terms.